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Silicon interposers and 2.5D packaging: the AI capacity queue

A 2.5D package mounts a processor and its memory stacks side by side on a piece of silicon that carries the wiring between them. It is the only practical way to connect the thousands of contacts a high-bandwidth memory interface needs — and its capacity has been the industry's most visible constraint on AI hardware supply.

In one sentence

A silicon interposer is a thin slab of silicon carrying fine wiring and vertical connections, on which multiple dies are mounted side by side so they can be connected at densities an organic substrate cannot achieve.

The problem it solves is connection density. A high-bandwidth memory stack presents an interface thousands of bits wide, and an ordinary package substrate cannot route that many connections in the available space. Silicon can, because it is patterned with the same lithographic processes used to make chips.

Calling it 2.5D distinguishes it from true 3D stacking: the dies sit next to each other rather than on top of each other, with the interposer beneath carrying signals between them and vertical connections passing power and external signals down to the substrate.

How it works

Why capacity is hard to add

The interposer is made in a fab on silicon wafers, and the assembly requires bonders that place dies to sub-micron accuracy. Both are specialised, both have long equipment lead times, and the process is operated at scale by a small number of firms. Adding capacity is a multi-year construction project, not a shift pattern change.

The area problem

An interposer must be at least as large as everything mounted on it, and accelerator packages have grown to well beyond the size a single lithographic exposure can print — requiring stitched exposures and pushing against the physical limits of handling large, thin silicon. Larger packages mean fewer per wafer and more warpage risk.

Cheaper alternatives, and their limits

Because full-size silicon interposers are expensive, alternatives place small silicon bridges only where high-density connections are needed, or use fine redistribution layers built up directly over the dies. Both reduce the silicon used. Neither has displaced the interposer for the largest, highest-bandwidth parts.

What this depends on

3 of these are marked as a chokepoint: a handful of qualified suppliers, a multi-year lead time, or a single geography.

  • Supply chainChokepoint

    Interposer wafer capacity

    Interposers consume fab capacity of their own, in addition to the wafers used for the dies mounted on them.

    Wafer fabrication
  • Supply chainChokepoint

    Precision die bonders

    Placing dies to sub-micron accuracy at volume requires specialised equipment with a narrow supplier base and long lead times.

    Bonding equipment
  • Supply chainChokepoint

    Package substrates

    The interposer assembly still has to sit on a large, high-layer-count build-up substrate to reach the board.

    Package substrates
  • Technology

    Through-silicon via formation

    The vertical connections are deep, narrow holes etched through the slab and filled with metal. Without high-aspect-ratio etch and void-free fill the interposer carries signals sideways and nothing downward.

    Deposition and etch
  • Technology

    Planarisation

    The fine wiring is built by damascene, which cuts trenches, fills them with copper and polishes the excess away. A polish that does not stop where it should shorts the layer.

    CMP

What depends on this

Other pages in this map that name Interposers and 2.5D as something they cannot do without.

Who supplies this

What each company supplies at this step, and — where a public figure exists — its share of this specific market — with what that share measures, the period it covers and who published it. Some rows also show the company’s own reported revenue for the segment covering this step, which is a different thing: it says how much this business matters to that company, not how much of the market it holds. Not a ranking and not a recommendation.

  • Taiwan Semiconductor ManufacturingTSM

    Operates the dominant 2.5D packaging platform used for AI accelerators.

  • Amkor TechnologyAMKR

    Provides outsourced advanced packaging and test services, including 2.5D assembly.

    Advanced Products segment — 82.8% of Amkor Technology’s reported revenue ($5.6B)FY2025 · company filings · not a market share

  • ASE TechnologyASX

    Large outsourced assembly and test provider expanding in advanced packaging.

  • Applied MaterialsAMAT

    Supplies process equipment used in interposer fabrication and packaging steps.

  • Samsung Electronics005930.KS· Korea

    Offers an integrated packaging path that competes for the same accelerator programmes, memory included.

  • United MicroelectronicsUMC

    Manufactures interposer wafers on mature nodes, which is one of the few ways capacity gets added quickly.

  • Supplies the organic substrate the interposer is mounted onto, and the alternative when the interposer itself is skipped.

  • Shinko Electric IndustriesPrivate

    Supplies high-end package substrates and is one of the few sources qualified for accelerator-class parts.

What would change the picture

  • Whether packaging capacity additions catch up with accelerator demand, or stay the pacing item.

  • Whether bridge and redistribution alternatives take share from full silicon interposers.

  • How much larger packages can get before warpage and handling set a hard limit.

Questions people ask about this

Why is packaging, of all things, the bottleneck?
Because it was a low-margin back-end step until recently, so the installed base was sized for that world. Then a product category appeared that requires it for every unit, at volumes nobody had planned for. Adding capacity means fabs, specialised bonders and trained operators — a multi-year build, not a quick expansion.
What does the '2.5D' actually mean?
Dies sit side by side on an interposer rather than stacked on top of one another. It is more than a flat package because the interposer adds a dense wiring layer with vertical connections, and less than 3D because the active dies are not on top of each other.

How these pages are written

Each page explains one technology in plain language, states what it depends on, and names companies by what they supply at that step. Company roles are described qualitatively and deliberately carry no market shares, revenue figures or rankings — those change faster than an explainer can, and a stale number is worse than none. Ticker links point at company pages on this site and are provided for reference only.

Nothing here is investment advice, a recommendation, or a forecast. A company named on a page about a technology is not thereby a good investment, and the chokepoints described are structural facts about supply chains rather than predictions about prices. Technology moves; where a page describes something as unresolved or in development, that was true when it was written.

Plutux is not an investment adviser. Market data and AI-generated analysis are for information and education only, not investment advice. Disclaimer

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