Sub-system
A process node is a package of transistor density, speed and power characteristics, not a measurement. What decides whether a node makes money is yield — the fraction of dies on a wafer that work — and yield is governed by defect density and die size in a relationship that punishes large chips severely.
In one sentence
A process node is a named generation of manufacturing technology with a characteristic transistor density, performance and power profile; yield is the fraction of dies on a wafer that meet specification.
Wafers are priced per wafer, not per working die. So the cost of a good die is the wafer cost divided by how many good ones come off it, which makes yield the dominant variable in whether a product is profitable — more so than the headline price of the process.
Yield depends on defect density and die area together, and the interaction is punishing. Random defects are scattered across a wafer; a larger die is a larger target, so the probability that a given die is defect-free falls steeply as area grows. This single relationship explains why very large chips are disproportionately expensive, and why the industry has moved toward splitting them into smaller pieces.
If defects land randomly at some density per unit area, the chance a die escapes all of them falls roughly exponentially with its area. Doubling die size does far more than double the loss. Beyond a certain size the yield is so low that the product is uneconomic at any price — which is the constraint chiplets were adopted to escape.
A new node starts at poor yield and improves over months to years as sources of defect are found and eliminated. That curve is why early production is expensive and reserved for products that can bear it, and why a mature node is cheap. Most of the improvement is unglamorous: finding the tool, the chemical or the handling step that produces particles.
Not every partially defective die is scrap. Chips are designed with redundancy — spare memory rows, extra cores — so a die with a defect in a redundant block can be repaired by configuration. Others are sold as lower-specification parts. Both practices convert what would be yield loss into revenue, and they are a designed-in feature rather than an afterthought.
Technology dependencies are solved by engineering; supply dependencies are solved by building something, which takes years.
Improving yield requires finding defects, which requires being able to see them; inspection capability sets the pace of the learning curve.
Metrology and testFiltration, ultrapure water, gas purity and wafer handling determine defect density more than any single process recipe.
Specialty gasesLayouts that avoid patterns known to be difficult to print yield better; this is a design-side contribution to a manufacturing outcome.
Physical designWhat a node generation actually delivers is largely the device structure it ships. A generation that cannot make the new structure yield is a generation with nothing to sell.
Transistor architectureCrystal defects and surface particles on the starting substrate become killer defects regardless of how well the process runs, so wafer defectivity sets a floor under yield.
Silicon wafersOther pages in this map that name Nodes and yield as something they cannot do without.
What each company supplies at this step, and — where a public figure exists — its share of this specific market — with what that share measures, the period it covers and who published it. Some rows also show the company’s own reported revenue for the segment covering this step, which is a different thing: it says how much this business matters to that company, not how much of the market it holds. Not a ranking and not a recommendation.
Operates the leading-edge nodes most advanced products are built on.
Supplies the inspection and metrology systems yield improvement depends on.
Supplies process control and inspection systems for wafer and packaging steps.
Supplies dimensional and materials metrology used in process control.
Supplies both the process tools and the electron-beam inspection that finds the defects those tools leave behind.
Supplies optical inspection and metrology, increasingly on the packaging side where yield is now also lost.
Runs leading-edge logic and memory lines, where the yield gap against the leader is the commercial problem.
Supplies the actinic mask inspection that catches defects before they are printed into every wafer in a lot.
Whether the cost per transistor keeps falling at leading-edge nodes or has flattened.
How fast new nodes climb the yield curve relative to previous generations.
Whether chiplet partitioning continues to substitute for large monolithic dies.
Each page explains one technology in plain language, states what it depends on, and names companies by what they supply at that step. Company roles are described qualitatively and deliberately carry no market shares, revenue figures or rankings — those change faster than an explainer can, and a stale number is worse than none. Ticker links point at company pages on this site and are provided for reference only.
Nothing here is investment advice, a recommendation, or a forecast. A company named on a page about a technology is not thereby a good investment, and the chokepoints described are structural facts about supply chains rather than predictions about prices. Technology moves; where a page describes something as unresolved or in development, that was true when it was written.
Plutux is not an investment adviser. Market data and AI-generated analysis are for information and education only, not investment advice. Disclaimer