Sub-system
A transistor is a switch whose gate controls whether current flows through a channel. As the channel shrank, the gate lost control of it — and each generation of transistor architecture is a different way of wrapping the gate more completely around the channel to get that control back.
In one sentence
Transistor architecture is the physical structure of the switching device — planar, fin-shaped, or a stack of horizontal sheets fully surrounded by the gate — chosen to maximise the gate's electrostatic control over the channel.
In the original planar design, the gate sat on top of a flat channel and controlled it from one side. As dimensions shrank, current began to leak through the parts of the channel furthest from the gate even when the device was supposed to be off. Leakage means power burned doing nothing, and it became the limit on scaling.
The fin structure fixed this by standing the channel up as a vertical fin with the gate wrapped around three of its sides. The gate-all-around structure goes further: the channel becomes several horizontal sheets stacked above one another, each completely surrounded by gate material. More surrounded channel means better control, less leakage, and the ability to keep lowering voltage.
Shrinking a planar device made it worse, not better, past a point. Restructuring it kept the same lithographic capability but improved the electrostatics, which is what allowed further scaling. This is why process generations increasingly deliver improvement through structure and materials rather than through smaller printed features.
Because the channel is a stack of sheets, the designer can vary the sheet width to trade drive current against area and leakage — a knob that fin-based designs did not have, since a fin's dimensions are fixed by the process. It is one of the practical advantages of the architecture beyond the electrostatics.
The next structural change moves the power distribution network to the underside of the wafer, so power reaches transistors from below while signals route above. That removes the thick power wiring from the congested signal levels and reduces voltage drop, and it requires wafer thinning and bonding steps that fabs did not previously need.
Technology dependencies are solved by engineering; supply dependencies are solved by building something, which takes years.
Sheet channels are built by depositing and then selectively removing sacrificial layers, which only works with atomic-scale process control.
Deposition and etchThe critical layers of these structures are printed with extreme ultraviolet exposure; without it the multi-patterning cost becomes prohibitive.
EUV lithographyBackside power delivery requires processing the underside of a wafer that has already been built on, a capability drawn from packaging.
Hybrid bondingA new device structure is unusable until it has been characterised into models and standard cells that a designer can build against. Silicon that nobody can design for ships nothing.
Process design kitsSheet thickness and gate wrap are inside the structure, not on its surface. Without measurement that reaches them the process cannot be held stable enough to yield.
Metrology and testOther pages in this map that name Transistor architecture as something they cannot do without.
What each company supplies at this step, and — where a public figure exists — its share of this specific market — with what that share measures, the period it covers and who published it. Some rows also show the company’s own reported revenue for the segment covering this step, which is a different thing: it says how much this business matters to that company, not how much of the market it holds. Not a ranking and not a recommendation.
Manufactures leading-edge logic and is transitioning its most advanced nodes to gate-all-around structures.
Develops its own leading-edge process technology, including gate-all-around and backside power delivery.
Supplies much of the materials engineering equipment these structures require.
Supplies the selective etch and deposition steps used to form stacked channels.
Was first to ship a gate-all-around transistor in production, ahead of the larger foundry.
Sets the ceiling on how small a structure can be printed, which is what any new transistor shape has to be designed within.
Runs the shared research fab where the next transistor generations are demonstrated before any one company commits to them.
How quickly gate-all-around yields reach the level fin-based processes achieved.
Whether backside power delivery becomes standard across leading-edge nodes or stays selective.
What structure follows sheets, and whether it arrives on the historical cadence.
Each page explains one technology in plain language, states what it depends on, and names companies by what they supply at that step. Company roles are described qualitatively and deliberately carry no market shares, revenue figures or rankings — those change faster than an explainer can, and a stale number is worse than none. Ticker links point at company pages on this site and are provided for reference only.
Nothing here is investment advice, a recommendation, or a forecast. A company named on a page about a technology is not thereby a good investment, and the chokepoints described are structural facts about supply chains rather than predictions about prices. Technology moves; where a page describes something as unresolved or in development, that was true when it was written.