Bottom line
The foundry is charging for scarcity, not just transistors.
A reported 5% to 10% increase across TSMC's advanced nodes is not just a pricing tweak. It is a signal that the most important bottleneck in AI hardware is no longer only logic design or model demand. It is the capacity to manufacture at the leading edge without destroying yield, packaging cadence, or gross margin.
That matters because TSMC is the toll booth for most of the frontier AI stack. When the toll rises, the question is who absorbs it: hyperscalers, chip designers, end-device OEMs, or consumers.
What changed
Advanced nodes are now the core business, not the premium edge case.
TSMC's 2025 annual report says advanced technologies, defined as 7-nanometer and more advanced, accounted for 74% of total wafer revenue, up from 69% in 2024. The same report says 3-nanometer technologies represented 24% of wafer revenue in 2025, while 2-nanometer entered high-volume manufacturing in 4Q25 with good yield.
TSMC gross margin reset
Official TSMC disclosures show the margin base has already moved materially higher before any reported price increase fully hits. This chart uses published annual and quarterly results.
단위: %
2024 gross margin
Annual report
56.1
2025 gross margin
Annual report
59.9
1Q26 gross margin
Quarterly results
66.2
| Metric | Published value | Why it matters |
|---|---|---|
| Advanced technologies | 74% of wafer revenue | Most of the revenue base is now exposed to leading-edge pricing. |
| 3nm share | 24% of wafer revenue | The newest nodes are already a core profit pool, not a niche. |
| 2nm status | HVM in 4Q25 | A new ramp can support tighter pricing discipline. |
| 2Q26 gross margin guide | 63.0% to 65.0% | Guidance stayed well above normal foundry economics. |
| Reported hike | 5% to 10% | The incremental pricing lever is material across a broad part of the stack. |
Financial read-through
TSMC already has the margin cushion, which is exactly why it can test the market.
TSMC reported 2025 consolidated revenue of NT$3,809.05 billion, net income of NT$1,717.88 billion, gross margin of 59.9%, operating margin of 50.8%, and net margin of 45.1%. In 1Q26, revenue was US$35.90 billion, gross margin 66.2%, and operating margin 58.1%.
That mix tells you two things. First, TSMC is not hiking prices from weakness. Second, the company has enough pricing power to defend capital intensity while still promising heavy investment, including 2-nanometer scale-up and future node ramps.
Illustrative blended uplift
Inference only: if 74% of wafer revenue faces a 5% to 10% increase, the blended uplift on total wafer revenue is roughly 3.7% to 7.4% before volume, mix, or customer negotiations.
단위: %
Low case
74% x 5%
3.7
Mid case
74% x 7.5%
5.6
High case
74% x 10%
7.4
Who pays
The downstream margin squeeze will be uneven.
| Company | Likely effect | Investor lens |
|---|---|---|
| Nvidia | Higher wafer and packaging cost base for GPUs and accelerators | Demand remains strong, but pricing power must keep up with BOM inflation. |
| Apple | More pressure on A/M-series silicon economics | Apple can absorb some cost, but device margin defense becomes more important. |
| AMD | Tighter product gross-margin math | Smaller scale makes wafer inflation harder to absorb cleanly. |
| Qualcomm | Cost pressure across mobile and data-center ambitions | China exposure complicates pricing and volume assumptions. |
| Broadcom | Custom silicon negotiations become more important | Customer-specific pricing can protect margin, but only if volume commits hold. |
- The winners are the customers with the strongest downstream pricing power or the most differentiated performance advantage.
- The losers are the names that were already relying on margin expansion to justify valuation.
- For the market, the bigger signal is that AI demand has moved foundry capacity from a cost center to a rent-extraction point.
