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Semiconductors / FoundryTSM9 min de lectura

TSMC's Advanced-Node Price Hike Turns AI Foundry Demand Into a Margin Test

TSMC is reportedly raising prices 5% to 10% across advanced nodes that made up 74% of 2025 wafer revenue. The move confirms that leading-edge capacity is being priced like scarce infrastructure rather than cheap industrial throughput.

Publicado 25 jun 2026Actualizado 25 jun 2026

Advanced nodes

74%

7nm and beyond were 74% of wafer revenue in 2025.

2025 gross margin

59.9%

TSMC reported a 59.9% gross margin for 2025.

1Q26 gross margin

66.2%

Gross margin reached a record in 1Q26.

Reported hike

5-10%

Industry reporting said advanced-node pricing rises were in that range.

2nm status

HVM

2nm entered high-volume manufacturing in 4Q25.

Foundry pricing graphic showing advanced-node capacity, margins, and AI demand pressure

Bottom line

The foundry is charging for scarcity, not just transistors.

A reported 5% to 10% increase across TSMC's advanced nodes is not just a pricing tweak. It is a signal that the most important bottleneck in AI hardware is no longer only logic design or model demand. It is the capacity to manufacture at the leading edge without destroying yield, packaging cadence, or gross margin.

That matters because TSMC is the toll booth for most of the frontier AI stack. When the toll rises, the question is who absorbs it: hyperscalers, chip designers, end-device OEMs, or consumers.

My view: this is a structural margin re-pricing, not a one-off inflation adjustment. The market should treat it as evidence that AI demand has pushed foundry economics closer to monopoly pricing than to a normal industrial cycle.

What changed

Advanced nodes are now the core business, not the premium edge case.

TSMC's 2025 annual report says advanced technologies, defined as 7-nanometer and more advanced, accounted for 74% of total wafer revenue, up from 69% in 2024. The same report says 3-nanometer technologies represented 24% of wafer revenue in 2025, while 2-nanometer entered high-volume manufacturing in 4Q25 with good yield.

TSMC gross margin reset

Official TSMC disclosures show the margin base has already moved materially higher before any reported price increase fully hits. This chart uses published annual and quarterly results.

Unidad: %

2024 gross margin

Annual report

56.1

2025 gross margin

Annual report

59.9

1Q26 gross margin

Quarterly results

66.2

Where the business is concentrated
MetricPublished valueWhy it matters
Advanced technologies74% of wafer revenueMost of the revenue base is now exposed to leading-edge pricing.
3nm share24% of wafer revenueThe newest nodes are already a core profit pool, not a niche.
2nm statusHVM in 4Q25A new ramp can support tighter pricing discipline.
2Q26 gross margin guide63.0% to 65.0%Guidance stayed well above normal foundry economics.
Reported hike5% to 10%The incremental pricing lever is material across a broad part of the stack.

Financial read-through

TSMC already has the margin cushion, which is exactly why it can test the market.

TSMC reported 2025 consolidated revenue of NT$3,809.05 billion, net income of NT$1,717.88 billion, gross margin of 59.9%, operating margin of 50.8%, and net margin of 45.1%. In 1Q26, revenue was US$35.90 billion, gross margin 66.2%, and operating margin 58.1%.

That mix tells you two things. First, TSMC is not hiking prices from weakness. Second, the company has enough pricing power to defend capital intensity while still promising heavy investment, including 2-nanometer scale-up and future node ramps.

Illustrative blended uplift

Inference only: if 74% of wafer revenue faces a 5% to 10% increase, the blended uplift on total wafer revenue is roughly 3.7% to 7.4% before volume, mix, or customer negotiations.

Unidad: %

Low case

74% x 5%

3.7

Mid case

74% x 7.5%

5.6

High case

74% x 10%

7.4

The inference above is deliberately simple. It ignores yield, node mix, and contract timing. Even so, it is enough to show that a relatively small headline hike can translate into a meaningful revenue lift at TSMC's scale.

Who pays

The downstream margin squeeze will be uneven.

Customer-level read-through
CompanyLikely effectInvestor lens
NvidiaHigher wafer and packaging cost base for GPUs and acceleratorsDemand remains strong, but pricing power must keep up with BOM inflation.
AppleMore pressure on A/M-series silicon economicsApple can absorb some cost, but device margin defense becomes more important.
AMDTighter product gross-margin mathSmaller scale makes wafer inflation harder to absorb cleanly.
QualcommCost pressure across mobile and data-center ambitionsChina exposure complicates pricing and volume assumptions.
BroadcomCustom silicon negotiations become more importantCustomer-specific pricing can protect margin, but only if volume commits hold.
  • The winners are the customers with the strongest downstream pricing power or the most differentiated performance advantage.
  • The losers are the names that were already relying on margin expansion to justify valuation.
  • For the market, the bigger signal is that AI demand has moved foundry capacity from a cost center to a rent-extraction point.
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